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问个VHDL代码的问题。下个这段代码综合起来会有什么不好的地方吗。看着不舒服，但是好像是对的。

haihai(享受阳光)

process( ResDrv, CXOut, MinClkCnt ) begin

if( ResDrv = '1' ) then

MinClkCnt <= b"000000";

elsif( CXOut'event and CXOut = '1' ) then

if( SecCarry = '1' and CmdReg(5) = '1' ) then

MinClkCnt <= b"000000";

elsif( SecCarry = '1' ) then

if( MinClkCnt = 59 ) then

MinClkCnt <= b"000000"; --Reset the count when 60 is reached.

else

MinClkCnt <= MinClkCnt + 1;

end if;

end if;

end if;

end process;

(#6551888@0)
Last Updated: 2011-3-9
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工作学习 / 学科技术讨论 / 问个VHDL代码的问题。下个这段代码综合起来会有什么不好的地方吗。看着不舒服，但是好像是对的。 -haihai(享受阳光); 2011-3-9 {722} (#6551888@0)
process( ResDrv, CXOut, MinClkCnt ) begin

if( ResDrv = '1' ) then

MinClkCnt <= b"000000";

elsif( CXOut'event and CXOut = '1' ) then

if( SecCarry = '1' and CmdReg(5) = '1' ) then

MinClkCnt <= b"000000";

elsif( SecCarry = '1' ) then

if( MinClkCnt = 59 ) then

MinClkCnt <= b"000000"; --Reset the count when 60 is reached.

else

MinClkCnt <= MinClkCnt + 1;

end if;

end if;

end if;

end process;

I don't see anything wrong with it, but I probably prefer to another way: -viv(viv); 2011-3-30 {346} (#6591652@0)
process( ResDrv, CXOut, MinClkCnt ) begin
if( ResDrv = '1' ) then
MinClkCnt <= b"000000";
elsif( CXOut'event and CXOut = '1' ) then
if( SecCarry = '1') then
if (CmdReg(5) = '1' or MinClkCnt = 59) then
MinClkCnt <= b"000000";
else
MinClkCnt <= MinClkCnt + 1;
end if;
end if;
end if;
end process;

Yours looks better, it usually works better as well. However, "MinClkCnt" should not be in the signal list. It should be corrected as "process( ResDrv, CXOut)". -iloveresort(秋水长天); 2011-6-14 (#6739910@0)

why? 那个signal list不是就是给模拟用的吗？对实际电路有什么影响吗？ -haihai(享受阳光); 2011-6-14 (#6739918@0)

"MinClkCnt" 既不是异步清零／置位信号，也不是同步时钟，不应在那里出现。综合工具一般忽略这个敏感信号表，但印象中也有的综合工具会报错。另外，读码时容易误解。 -iloveresort(秋水长天); 2011-6-20 (#6753359@0)

@Calgary

问个VHDL代码的问题。下个这段代码综合起来会有什么不好的地方吗。看着不舒服，但是好像是对的。

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